The "is not accessible through controller port" is the important part.
DMP then proceeds to flip paths on both nodes.
This occurs because the array has 2 controllers with multiple ports. Each of the storage switches need to use the same ports across the array controllers. Also, this configuration should only support 2 paths from each node to storage, not 4 paths.
It should look like this:
node_1 is able to see ctlrA_p0 via HBA c2
node_1 is able to see ctlrB_p0 via HBA c3
node_2 is able to see ctlrA_p0 via HBA c2
node_2 is able to see ctlrB_p0 via HBA c3
Node [1 ] [2 ]
Ctr/hba 2 3 2 3
Paths | \ / |
| \/ |
| /\ |
| / \ |
| / \ |
Switch [ 1 ] [ 2 ]
Paths | |
Array | |
Ctrl [ A | B ]
Oct 16 09:49:10 prdora1 vxdmp: [ID 488946 kern.notice] NOTICE: VxVM vxdmp V-5-0-327 The disk 268/0x78 in disk array 600A0B80001140580000000043C7CF39 is not accessible through controller port 202500A0B8114058
Whenever a node is joining the CVM cluster, and if the cluster has a shared dg on a non A/A array, then the master will be giving the port id (1A, 2A etc.) of the array which is to be used. If the array storage processor has two ports and if the master and the joining node are connected through different ports, then the join fails with the above mentioned error message.
The SAN must be cabled in such a way that each node in the CVM cluster has the same primary path through the same Array access port or controller.
Apply this HF to avoid the problem again as it fixes the device claiming within the Array Support Library by using storage processor ID rather than array port id on VxVM 4.1MP2RP7HF6 via the e1883034 or install 4.1MP2RP11 when it becomes available (tentatively scheduled for Feb 2012).
HDS ALUA array